DisplayPort 2.0 adds new capabilities to address the future performance requirements of traditional displays. These include beyond 8K resolutions, higher refresh rates and high dynamic range (HDR) support at higher resolutions, improved support for multiple display configurations (two 8K displays or even three 10K displays with HDR!), as well as improved user experience with augmented/virtual reality (AR/VR) displays, including support for 4K-and-beyond VR resolutions.
The advantages of DP 2.0 are enjoyed across both the native DP connector as well as the USB Type-C connector, which carries the DP audio/video signal through DisplayPort Alt Mode. DP 2.0 is backward compatible with previous versions of DisplayPort and incorporates all of the key features of DP 1.4a, including support for visually lossless Display Stream Compression (DSC) with Forward Error Correction (FEC), HDR metadata transport, and other advanced features. The increased video bandwidth performance of DP 2.0 carried over the USB-C connector enables simultaneous higher-speed USB data transfer without compromising display performance. DP 2.0 leverages the Thunderbolt 3 physical interface (PHY) layer while maintaining the flexibility of DP protocol in order to boost the data bandwidth and promote convergence across industry-leading IO standards.
In addition, the new data rates of DP 2.0 come with a display stream data mapping protocol common to both single-stream transport and multi-stream transport. This common mapping further facilitates multi-stream transport support of DP 2.0 devices for a single DP port on the source device to drive multiple displays either via a docking station or daisy-chainable displays. First products incorporating DP 2.0 are projected to appear on the market by late 2020.
“Intel’s contribution of the Thunderbolt PHY layer specification to VESA for use in DP 2.0 is a significant milestone making today’s simplest and most versatile port also the highest performing for display,” says Jason Ziller, General Manager, Client Connectivity Division at Intel. “By collaborating with VESA, we’re enabling common building block technologies to come together across a wide range of devices and increasing compatibility to deliver better experiences to consumers.”
Industry efforts are underway to push video broadcasting beyond 4K/Ultra HD resolutions, while 8K televisions and PC monitors are already beginning to hit the market. For example, the Japan Broadcasting Company (NHK) has announced plans to broadcast the 2020 Summer Olympics in 8K, and has already begun to broadcast 8K content to viewers.
At the same time, gaming platforms are pushing the envelope on immersive gameplay, driving demand for higher resolutions and video frame rates across PC, laptop, and mobile platforms, including smart phones and VR headsets. Further developments in display interfaces are needed to address these developments.
The previous version of DisplayPort, v1.4a, provided a maximum link bandwidth of 32.4 Gbps, with each of the four lanes running at a link rate of 8.1 Gbps/lane. With 8b/10b channel coding, that equates to a maximum payload of 25.92 Gbps. DP 2.0 increases the maximum link rate to up to 20 Gbps/lane and features more efficient 128b/132b channel coding, delivering a maximum payload of 77.37 Gbps – up to a three-fold increase compared to DP 1.4a. This means that DP 2.0 is the first standard to support 8K resolution (7680 x 4320) at 60 Hz refresh rate with full-color 4:4:4 resolution, including with 30 bits per pixel (bpp) for HDR-10 support.
The performance increases enabled by DP 2.0 are through both native DP connectors and the USB-C connector via DP Alt Mode. USB-C allows a single connector for USB data, video data and power. If simultaneous support of SuperSpeed USB data and video is needed, the significantly increased data rates enabled by DP 2.0 give users the ability to have power and SuperSpeed USB data at the same time as super-high-resolution video.
“Being an open standards body comprising more than 280 member companies across the electronics value chain gives VESA a unique vantage point to anticipate the needs of the display market several years out and add new capabilities to our standards ahead of demand,” states Alan Kobayashi, VESA Board Chair and VESA DisplayPort Task Group Chair. “DP 2.0 represents one of our most significant milestones in the history of DisplayPort, and is the culmination of several years’ effort and major enhancements to this ubiquitous standard. Like the previous versions of DisplayPort that helped pave the way for major inflection points in video technology such as UHD, 4K, 5K, video over USB-C and HDR, DP 2.0 will help take the industry to the next level – enabling even higher frame rates and resolutions up to and beyond 8K, greater flexibility in display configurations including multiple monitor setups, as well as improved power efficiency.”
DP 2.0 also supports VESA’s new Panel Replay capability, which is designed to optimize the power envelope and thermal performance of smaller end devices, such as all-in-one PCs and laptops, with higher resolution displays. Similar to the Panel Self Refresh capability in Embedded DisplayPort (eDP), Panel Replay incorporates a partial update feature that enables the system video processor, or GPU, to update only the portion of the display that has changed since the video frame update, thus saving system power. Advantages include the ability to recharge a device more quickly while at the same time using it.
Cadence DisplayPort 2.0 Verification IP
Cadence Design Systems also announced the availability of the industry’s first Verification IP (VIP) in support of the new DisplayPort 2.0 standard, enabling designers to quickly and thoroughly complete the functional verification of their mobile, Audio-Visual and AR/VR system-on-chip (SoC) designs.
The latest Cadence VIP for DisplayPort 2.0 has been architected to meet the specifications of the new standard — enhancing design verification productivity, ensuring high-quality designs and delivering maximum performance. The Cadence VIP for DisplayPort 2.0 offers comprehensive protocol validation solution for DisplayPort designs and includes a configurable bus functional model (BFM), a protocol monitor and a library of integrated protocol checks to optimize verification predictability. Additionally, the VIP has been designed for easy integration into test benches at IP, SoC and system levels, helping engineers reduce time to first test and accelerate verification closure.
www.cadence.com/go/displayportvip | www.vesa.org