Audio Weaver from DSP Concepts is a low-code, hardware-independent audio platform that streamlines audio development and reduces risk and complexity by utilizing a drag-and-drop host application for product design, paired with an audio processing engine embedded in the target SoC or DSP. Featuring an extensive set of signal processing libraries, Audio Weaver contains tools that assist product makers at each step, from prototype to production.
Audio Weaver is hardware-independent, as its AWE Core runtime libraries can be embedded on microcontroller units (MCUs), system-on-a-chip (SoCs), and dedicated digital signal processors (DSP) from a wide range of silicon manufacturers.
Audio Weaver makes available over 550 signal processing blocks, referred to as modules. Specialized modules including custom automotive IP are also available, with features such as in-cabin voice communication, audio upmixing, engine harmonic cancellation, and road noise control. Audio Weaver can be used to design the full gamut of automotive audio systems from basic designs with 4 speakers, to full-featured automotive systems with engine sound synthesis, warning systems, and 30+ speakers.
Signal processing layouts designed in Audio Weaver can be auditioned, tuned, and debugged from within the PC-based Audio Weaver Designer application, before deploying the design to its destination hardware. When ready to deploy to a target product with embedded AWE Core libraries, no redesign is required. With more efficient use of the Audio Weaver embedded libraries, CPU load is decreased in many cases, allowing processing headroom to support more complex algorithms.
The ADSP-2156x series of processors from Analog Devices, Inc. are designed to provide immersive audio in automotive and consumer/pro-audio applications, featuring a SHARC+ DSP core, upgraded from its predecessor SHARC core to natively support double-precision floating-point operations. The ADSP-2159x series adds a second SHARC+ DSP core to double the performance in a pin-compatible package, thus providing performance scalability from 400 MIPS to 2000 MIPS in a single PCB design. Finally, the ADSP-SC59x series adds an Arm Cortex-A5 core to support system connectivity in addition to the DSP performance, with models featuring either one or two SHARC+ DSP cores.
FIR/IIR hardware accelerators allow more efficient use of select audio filters, operating in parallel with the SHARC+ DSP core(s) at the SHARC+ DSP core clock rate for increased processing capability without additional cost. While the single-core ADSP-2156x processors feature one FIR and one IIR engine, the ADSP-2159x/SC59x processors are equipped with one FIR engine and four IIR engines per DSP core. With the SHARC+ DSP core, the integrated filter accelerators, and the large on-chip SRAM, the ADSP-2156x/2159x/SC59x series of SHARC+ processors are ideal for low-latency automotive audio applications such as immersive 3D sound, personal audio zones, automotive active noise cancellation, road noise cancellation, engine sound synthesis, and vehicle warning systems.
DSP Concepts and Analog Devices have been working together to optimize the performance of AWE Core libraries on SHARC+ processors. In this collaborative effort, the two companies have approached the optimization effort via multiple avenues.
DSP Concepts has focused on the embedded Audio Weaver Core runtime libraries, which contain the collection of processing modules. Both standard and advanced DSP modules have been optimized for the SHARC+ cores, exhibiting significant improvement in CPU load.
Analog Devices has made improvements to the AWE Core libraries to use FIR/IIR assembly optimized to make best use of the 11-stage pipeline of the SHARC+ core and to leverage the FIR/IIR hardware accelerators wherever possible. Additionally, the optimized AWE Core has incorporated Analog Devices’ statistics functions, optimized math functions, and a host of hand-optimized DSP libraries such as complex and real Fast Fourier Transform (FFT) algorithms.
As a result of this effort, AWE Core libraries running on SHARC+ processor cores exhibit increased efficiency that can reduce overall CPU load, providing more overhead for additional features or increased channel counts. For example, comparing ADSP-21569 benchmarks before and after optimization shows an appreciable improvement. A stark contrast can be observed in designs utilizing FIR or Biquad filter modules instantiated across high channel counts, with a potential increase in processing headroom of more than 13%.
For automotive audio system design, the newly optimized AWE Core libraries and SHARC+ processor cores provide a significant advantage to developers. This combination of tools helps streamline the development process, and the joint optimization effort by DSP Concepts and Analog Devices demonstrates real-world results that help product makers create competitive, feature-rich designs.
Click here to see a full report on the gains that are achieved with these optimizations.
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