The new Cirrus Logic timing devices, CS2500, CS2501, and CS2600 introduce advanced features that generate stable low-jitter clocks and provide an ideal clocking solution for the most prevalent audio networks, enabling downstream audio-data converters and digital-audio systems to maximize their performance while keeping the systems completely synchronized. These are drop-in replacements for previous Cirrus Logic product lines, CS2000, CS2100, CS2200 and CS2300.
Key highlights in the new generation devices include exceptional audio quality providing lower than 50ps baseband jitter, advanced hardware mode for simplified integration, automatic rate detection to enhance ease of use, and glitchless clock transitioning that always provides a clock signal, independent of the reference without causing a glitch. A phase sync loop ensures that multiple audio signals or devices stay precisely aligned.
The new CS2500 incorporates a programmable phase-locked loop (PLL). The hybrid analog/ digital PLL architecture comprises a delta-sigma fractional-N analog PLL and a digital frequency-locked loop (FLL). The CS2500 enables frequency synthesis and clock generation from a stable timing reference clock. The device can generate low-jitter clocks from a noisy clock reference at frequencies as low as 50Hz. The CS2500 can be configured using a control interface supporting I2C and SPI modes of operation.
The CS2500 can be powered from a single 1.8V or 3.3V supply and is available in commercial-grade 10-pin TSSOP package for operation from –40°C to +85°C. The device is also available in the AEC-Q100-qualified grade-2 package for operation from –40°C to +105°C. The CS2501 model adds an internal oscillator that can provide the timing reference clock in the same package, enabling a reduction in external component requirements.
The CS2600 supports BCLK and FSYNC outputs, derived from the PLL output signal. All of the clock outputs can be phase-aligned with the clock input source, with automatic rate control (ARC) function that detects the clock input frequency and configures the PLL ratio for the required output. The larger commercial-grade 16-pin QFN device is also available in the AEC-Q100-qualified grade-2 package, and provides a built-in OTP memory to configure the default operating settings, loaded at boot-up, optimized and managed to support multiple programming cycles.
"We are thrilled to introduce this product line to both the pro-audio and automotive markets," says Eddie Sinnott, Director of Codecs & Standard Products at Cirrus Logic. "These new timing devices not only seamlessly replace our existing devices but also introduce new features that simplify integration and provide robust low-jitter clocks for digital audio applications. With advancements like phase sync loop, glitchless clock transitioning, and hardware-only mode, we're setting a new benchmark for clocking solutions."
These innovations position Cirrus Logic's timing solutions as an ideal choice for product developers seeking to optimize audio performance across demanding applications. The series is designed to be the perfect fit for a wide range of systems, offering synchronization capabilities for complex audio networks, improved reliability in automotive environments, and enhanced scalability for professional audio setups.
The new Cirrus Logic timing devices are now available for sampling to qualified customers. Full production is scheduled for May 2025.
www.cirrus.com/pro-audio
