Western Digital Announces Plans to Open Source New RISC-V SweRV Core to Accelerate RISC-V Processor Development
During the RISC-V Summit, in Santa Clara, CA, Western Digital announced three new open-source innovations designed to support Western Digital’s internal RISC-V development efforts and those of the growing RISC-V ecosystem. In his keynote address, Western Digital’s Chief Technology Officer Martin Fink unveiled plans to release a new open source RISC-V core, an open standard initiative for cache coherent memory over a network and an open source RISC-V instruction set simulator.
